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job details
overview
designs and optimizes custom physical layouts for analog, mixed-signal, and memory circuits in cmos technology, ensuring performance, area, and reliability goals are met.
responsibilities
* plan, design, and validate highly customized physical layouts using virtuoso xl.
* collaborate with circuit designers to meet functional and performance specs.
* leverage best-known methods to create high-quality layouts efficiently.
qualifications
minimum qualifications are required to be initially considered for this position.
* bachelor's degree in electrical engineering or related field.
6+ months of experience working with any of the following:
* eda tools, drc/lvs, and cmos process.
* design hierarchy, hierarchical layout integration, using fill to meet design rules in a block, and layout floorplan.
* basic integrated circuit operation.
* unix environment.
must have unrestricted permanent right to work in mexico. The position is in mexico; it is not eligible for employment-based visa/immigration sponsorship.
preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
* 2+ years of experience working with device-level cmos analog/memory custom layout design. Experience with advanced process nodes.
* icc, fusion compilers, and icwbev+.
* scripting skills (python, skill) for automation.
* berkely analog generator.
* knowledge of vlsi design.
requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
a candidate who accepts an offer of employment in mexico is required to present their own personal identification information and numbers for the following: mexican security number (nss), tax identification number (rfc) and curp identification number.
job details
* job type: college grad
* shift: shift 1 (mexico)
primary location: mexico, guadalajara
additional locations
business group: intel foundry
posting statement: all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
work model for this role: this role will require an on-site presence. Job posting details are subject to change.
seniority level
* entry level
employment type
* full-time
job function
* engineering and information technology
* industries: semiconductor manufacturing
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