*our vision is to transform how the world uses information to enrich life for *_all_*.*
micron technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
what's encouraged daily:
- be/btech or mtech in electronic/vlsi engineering or equivalent
- responsible for the design and development of analog layouts used in dram chips.
- perform layout verification like lvs/drc/em, quality check, and documentation.
- responsible for on-time delivery of block-level layouts with acceptable quality. - demonstrate leadership skills in planning, area/time estimation, scheduling, delegation, and execution to meet project schedules/landmarks in multiple project environments.
- lead junior team-members in their execution of sub sub-block-level layouts & review their work.
- contribute to effective project management and technical innovation
- plan and document your layout, presenting material for global teams to review - optimally connect with engineering teams in india, japan the us, and other global teams to ensure the success of the layout project.
how to qualify:
- must have 10 + years of experience in analog layout designs in sophisticated cmos processes.
- should have expertise in multiple ip layout library developments.
- knowledge of dram chip architecture is needed should be able to perform ip layout development and physical verification activities for complex designs as per provided specifications.
- should have expertise in layout area and routing optimization, design rules, yield and reliability issues.
- good understanding of layout fundamentals i.e. Electro-migration, and latch-up, coupling, crosstalk, ir-drop, parasitic analysis, matching, shielding, etc.
- should have adequate knowledge of schematics, interface with circuit designer and cad team.
- understanding layout effects on the circuit such as speed, capacitance, power, and area, etc.,
- excellent in problem-solving skills in solving area, power, performance, and physical verification of custom layouts.
- experience with cadence tools including virtuoso schematic editor virtuoso layout l, xl & verification tools like mentor calibre
- proficient in device matching, parasitic analysis, electron migration, and isolation techniques.
- should have leadership skills and able to do multi-tasking as required. Should be able to work in a team environment and able to guide and provide technical support to fellow team members.
- self-motivated, hardworking, goal-oriented, and excellent verbal and written communication skills.
- knowledge of skill coding and layout automation is a plus.
micron prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.