Position title: senior design layout engineerjob location: jalisco, mexicoresponsible for design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like lvs/drc/antenna, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Will bee leading planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. Guide junior team-members in their execution of sub block-level layouts & review their work. Effectively communicating with global engineering teams to assure the success of layout project.3+ years' experience in analog/custom layout design in advanced cmos process, in various technology nodes (planar, finfet). ~ ability to understand design constraints and implement high-quality layouts.experience in managing multiple layout projects, ensuring quality checks are taken care at all stages of layout development. The role also does not carry the authority to make definitive decisions regarding contracts, be it their conclusion or termination. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, micron delivers a rich portfolio of high-performance dram, nand, and nor memory and storage products through our micron and crucial brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5g applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.com/careers all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. Misuse of ai to fabricate or misrepresent qualifications will result in immediate disqualification.