Our mission is to transform how the world uses information to enrich life for all. We are a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate, and advance faster than ever.
key responsibilities
* we design and verify high-density memory chips with complex functionality, ultra-high speed, and advanced low power technology.
* our team evaluates designs at chip or block level for functionality and provides solutions.
* we collaborate with global design teams using verification tools and techniques, providing status updates.
* we develop digital/analog mix-signal verification methodologies for advanced dram products and design verification environments.
minimum qualifications
* experience with systemverilog assertion (sva) is required.
* a degree in electrical or computer engineering with 6+ years of industry experience is necessary.
* mixed-signal verification experience is mandatory.
* familiarity with simulation tools like hspice, verilog hdl, finesim is expected.
* knowledge of verification languages (systemverilog, uvm) and scripting languages (python, perl) is essential.
this role does not involve sales contract finalization, pricing negotiations, or contract authority.
we drive innovation in memory and storage solutions, transforming information use worldwide. Our innovations fuel data economy advances, ai, and 5g applications.