Job detailsjob description: this position requires candidates to upload a resume in english; you are welcome to upload multiple versions of your resume if you prefer but an english version of your resume will be required to be considered for this position.the world is transforming and so is intel.here at intel, we believe the world needs technology that can enrich the lives of every person on earth.the e-core cpu team is a cpu core development team in guadalajara, mexico.we believe that developing these technologies takes a team of exceptionally talented individuals who work together to visualize, innovate, and make the future of computing possible.if you are excited about advanced development of breakthrough technologies for future-generation cpu cores, we welcome you to join us, to do something wonderful.the focus of this role is to be part of a team of logic design verification engineers to implement new and existing features for intel's next generation cpu ip resulting in high quality design.you will be responsible for developing the rtl implementation of new architecture capabilities meeting specification requirements on area, power and performance.role responsibilities include although not limited todevelopment of micro-architecture specification for new design features.performing and debugging digital simulations, and driving to closure of bugs.development of functional coverage and achieving coverage goals.working closely with architects, and other team members to ensure high quality of design.deliver high-quality output against deadlines and able to work effectively in a cross-site team environment.this internship has a duration of one year.candidates are required to work a minimum of 30 hours per week.qualificationsminimum qualifications are required to be initially considered for this position.preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.minimum qualificationspursuing a bachelor's or master's degree in computer science, electrical engineering, electronic engineering, systems engineering, mechatronics, or a related field, with at least one year remaining before graduation.4 months of experience in:digital design, asic design flow and computer architectureat least one programming/scripting languages such as c/c++, perl, ruby, python, and unix (linux)hardware description languages (such as vhdl, verilog or system verilog)basic skills pertaining to pre-si validation, examples include: logic simulators (xilinx, quartus, modelsim, vcs)debug capabilities.advance english level.must have unrestricted, permanent right to work in mexico (this role is not eligible for visa or immigration sponsorship).preferred qualificationsbasic testbench development and test scenarios writing, functional coverage concepts and implementation.this team is responsible to ensure the highest quality of intel's cpu designs, in a dynamic cross-team environment.essential soft skills for candidates include excellent problem-solving skills, initiative, interpersonal skills, and good written and verbal communication skills.a candidate who accepts an offer of employment in mexico is required to present their own personal identification information and numbers for the following: mexican security number (nss), tax identification number (rfc) and curp identification number.job typestudent / internshiftshift 1 (mexico)primary locationmexico, guadalajarabusiness groupsilicon and platform engineering group (spe): deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.posting statementall qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.position of trustn/awork model for this rolethis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned intel site and off-site.job posting details (such as work model, location or time type) are subject to change.#j-*-ljbffr