Job description
we are seeking a seasoned verification engineer with expertise in complex soc devices. As an experienced professional, you will be responsible for designing and developing comprehensive verification strategies, leading cross-functional teams, and mentoring junior engineers.
our ideal candidate has a strong understanding of uvm methodology-based verification, proficiency in systemverilog, hdl, and scripting languages (perl, python), as well as hands-on experience with synopsys verification tools (vcs, verdi) and modern verification flows.
key requirements
* bachelor's or master's degree in electrical, computer engineering, computer science, or related field.
* 8+ years of experience verifying soc devices, with at least 6 years dedicated to pre-silicon verification.
* expertise in uvm methodology-based verification and proficiency in systemverilog, hdl, and scripting languages (perl, python).
* strong understanding of standard protocols (pcie, ddr4, gddr, hbm, amba); knowledge of formal and power-aware verification is a plus.
impact you will have
* achieving accelerated time-to-market for cutting-edge silicon solutions by ensuring robust verification coverage.
* enhancing product reliability and performance through rigorous test planning and execution.
* driving innovation in verification methodologies and flows, setting new industry standards.