The memory and i/o technologies team (mio) is excited to announce an opportunity to join our growing team within intel's datacenter and ai group.
mio works to define and validate dram memory and i/o technologies for intel, and we have exciting opportunities to help improve the next generations of dram main memory.
*as a memory validation engineer in mio your responsibilities would include but not limited to*:
- create memory validation test plans.
- use platform level hardware and software tools to ensure performance to memory specifications.
- responsible for execution of ddr memory stress tests in system and debug of failures.
- interface with architecture, design, and validation teams to review and address debug results.
*qualifications*
*minimum qualifications*:
- bachelor's degree in electrical engineering, electronics engineering, computer engineering, computer science or related field (documentation related to bachelor's degree completion will be required).
*2 years of experience in one or more of the following areas*:
- python
- performing debug or testing of computer systems.
- logic analyzer, oscilloscope, bit error rate tester, memory testers, or other electronics test equipment.
*preferred qualifications*:
- 1 year of experience in some of the following areas: c/c++ coding, database, platform validation, or ddr or lpddr memory testing
*inside this business group*
the data platforms engineering and architecture (dpea) group invents, designs & builds the world's most critical computing platforms which fuel intel's most important business and solve the world's most fundamental problems.
dpea enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5g to high-performance computing, and dcg delivers the products and technologies—spanning software, processors, storage, i/o, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.
*work model for this role*
this role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned intel site and off-site.